Silex Insight has said it has achieved record-breaking speed for its ChaCha20-Poly1305 hardware crypto engine, managing 800Gbps in ASIC and 100Gbps in an FPGA. Its’ RFC7539 compliant intellectual ...

You see them at almost every user seminar or industry trade show workshop: the Methodology Managers from XYZ Corporation, who describe the system they use to help the company make sense of the ...

The DB8051C-FSM 8-bit Microcontroller’s low VLSI footprint and high performance make it particularly suitable for flexible Complex FSM Design GLEN ROCK, New Jersey, April 28, 2011 – Digital Blocks ...

When designing IP for system-on-chip (SoC) and application-specific integrated circuit (ASIC) implementations, IP designers strive for perfection. Optimal engineering often yields the smallest die ...

YOKOHAMA, Japan--(BUSINESS WIRE)--Macnica, Inc., a global leader in distributing semiconductors, electronic components, and network equipment, with its headquarter located in 1-6-3 Shin-Yokohama, ...

Fibre Channel intellectual property (IP) cores have been developed for FPGAs, with the cores presently optimized for Stratix, Stratix GX, Cyclone, and Hardcopy devices. Initial offerings include three ...

The objective of this course is to learn how to develop, program, and use Softcore Processors with associated IP integration. To accomplish this, the Nios II Softcore Processor from Intel Altera is ...

May 12, 2004 - DMAC 10/100 Mb Media Access Controller has been released. The DMAC is hardware implementation of media access control protocol defined by the IEEE standard. It is developed as an ...

TEWKSBURY, Mass.--(BUSINESS WIRE)--Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of the SimAccel FPGA-based accelerator to ...

The company's library of FPGA IP cores for automotive applications now include local interconnect network (LIN) and controller area network (CAN) cores. The added cores support its automotive- and ...