EDN

DESIGN FLOWS: Engineers write up SystemC TLM concepts

Santa Cruz, Calif. – Claiming to document a major step forward in system-on-chip design, STMicroelectronics engineers are writing a book about the SystemC transaction-level modeling the European ...
EDN

SystemC standards group releases transaction-level modeling standard

SystemC standards group Open SystemC Initiative (OSCI) has released the SystemC TLM (transaction-level modeling) standard version 1.0. The TLM standard kit, which can be downloaded under an open ...
Design-Reuse

The Open SystemC Initiative Announces Availability of the SystemC Transaction-level Modeling Standard with Broad Industry Support

SAN JOSE, Calif.--(BUSINESS WIRE)--June 6, 2005--The Open SystemC Initiative (OSCI) today announced the delivery of the SystemC(TM) Transaction-level Modeling (TLM) Standard 1.0. The availability of a ...
Design-Reuse

OVP Simulator Smashes SystemC TLM-2.0 Performance Barrier

Thame, U.K. -- February 13, 2009-- Open Virtual Platforms (OVP) today released new native SystemC transaction level modeling (TLM)-2.0 technology to use with OVP CPU models that run to the speed of ...
Electronic Design

OSCI Proposes Extensions To TLM Standard

The Open SystemC Initiative (OSCI) has delivered its Draft SystemC Transaction-Level Modeling (TLM) 2.0 kit, containing proposed extensions to OSCI TLM application programming interface (API) ...
CIOL

Synopsys supports OSCI SystemC TLM-2.0

MOUNTAIN VIEW, USA: Synopsys Inc. has announced support for the newly ratified Open SystemC Initiative (OSCI) SystemC TLM-2.0 standard in its Innovator and DesignWare System-Level Library products.
Business Wire

IEEE Approves Revised IEEE 1666™ “SystemC Language” Standard for Electronic System-Level Design, Adding Support for Transaction-level Modeling

PISCATAWAY, N.J.--(BUSINESS WIRE)--IEEE, the world's largest professional association advancing technology for humanity, today announced that the IEEE Standards Association (IEEE-SA) Standards Board ...
Business Wire

Reference Virtual Platform of ARM Model Running Linux Under SystemC/TLM-2.0 Released by Open Virtual Platforms (OVP)

THAME, England--(BUSINESS WIRE)--The Open Virtual Platforms (OVP) initiative (www.OVPworld.org) has announced the release of a reference virtual platform of the ARM Integrator development board using ...
Semiconductor Engineering

Interface Additions To The e Language For Effective Communication With SystemC TLM 2.0 Models

The last several years have seen strong adoption of transaction-level models using SystemC TLM 2.0. Those models are used for software validation and virtual prototyping. For functional verification, ...
Semiconductor Engineering

Framework To Control And Interact With SystemC-based Virtual Platforms Using The FMI (RWTH Aachen Univ. et al.)

A new technical paper titled “FMI Meets SystemC: A Framework for Cross-Tool Virtual Prototyping” was published by researchers at RWTH Aachen University, MachineWare and tracetronic. “As systems become ...
Electronic Design

Implement Abstraction By Encapsulation In SystemC

High-level design (HLD) represents a hardware design at a more abstract level than register transfer level (RTL). A high-level synthesis (HLS) tool then can be used to produce the RTL necessary to ...